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authorAndrey Tkachenko2022-05-24 17:52:32 +0000
committerGitHub2022-05-24 17:52:32 +0000
commit67fe16008e60893e1dfc9ef237c2421ebb703841 (patch)
tree0bec678cdc0b5ca2bcac7b650e191763f6c6af70 /screenshot.png
parent386dccc84ed4cdeea6a9aed727c04bbb0facc374 (diff)
Basic verilog support (#2552)
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